Code and external firmware
Confirm provenance rules, the linked image, and the terms for obtaining and using DDR and BL31 before starting platform work.
DEVELOPMENT
The latest progress and changelog for CORE and WAYFINDER OS, plus a week-by-week plan through December 2026.
Next up: lighting the display and showing the interface on October 20. The first 3 engineering samples are expected to be completed in March 2027.
UPDATES
Expected completion of 3 first-revision CORE units, followed by full-device power, range, and environmental testing.
The display lights up and shows the WAYFINDER interface. At this stage the screens are for demonstration only and are not yet fully operable.
Published LoRa design targets, preliminary specifications, and development progress.
The six-layer carrier board completed its first-pass layout to the OSM v1.2 Size-L standard pinout. It goes to prototype fabrication once the vendor's pin table and mechanical drawings are confirmed.
The M0 milestone was completed and tagged in the QEMU emulation environment, ahead of the original October schedule. Next: porting to a physical development board.
An OSM Size-L Genio 720 compute module (industrial-grade MT8391). Memory and SoC are integrated on the module, so the carrier board focuses on power, communication, and interfaces.
10 km on flat terrain, 2 km in harsh mountain terrain. Priority given to an internal LoRa antenna.
First-revision wireless: LoRa (LR2021 ×1), LTE with eSIM, GNSS, and Wi-Fi/Bluetooth. No UWB. NFC and a second LoRa radio have reserved footprints.
CORE / SEPTEMBER–DECEMBER 2026
Through December, the focus is WAYFINDER OS M0 / M1 and a power proof of concept. The M2 prototype, with display, touch, storage, and UI, will be scheduled separately. Actual dates will shift with staffing, funding, access to documentation, and hardware verification.
October 11 update: M0 was completed on September 27, ahead of the October schedule below. October now centers on the October 20 interface demo and M1 preparation. The original week-by-week plan below is kept for reference.
Revised to match the latest in-house OS scope: the earlier goal of a "fully operable prototype in December" has changed to foundational verification and a milestone demo. There is no release or delivery date yet.
Weeks are this plan's own scheduling segments; the listed dates are authoritative. Expected outcomes for each week do not mean the work is done. M1 can proceed only once boards, documentation, and boot firmware are available.
First, confirm we can obtain what is needed to boot, and draw the line between our own code and external firmware.
Document the in-house scope, toolchain, and how runtime code will be checked. List available staffing and existing resources.
Acceptance checklist, code-provenance rules, resource inventory
Confirm the terms for obtaining boards, DDR initialization, BL31, boot media, and register documentation. Differences for MAX are listed separately.
Platform feasibility table, firmware and documentation gaps
Compile quotes based on M0 / M1 and power-measurement needs, closing gaps in boards, documentation, and essential tools first.
Itemized draft budget, delivery and equipment-loan arrangements
Prioritize reproducible core tests. Success in emulation does not replace verification on real hardware.
Set up minimal loading, UART, and exception output on QEMU virt, and check the link sources of the final image.
Reliably bootable M0 prototype, link-source record
Set up page tables, basic memory allocation, and page fault handling, with documented fault-injection and reporting steps.
Memory and exception test records
Verify interrupts, the timer, and a minimal scheduler on the emulated platform, logging context switches and error states.
Scheduling and interrupt test cases
Build minimal user processes, system calls, and isolation tests, prioritizing reproducible failures.
User process demo, isolation test list
Check multi-core boot and basic coordination, and list the M0 items that still fail.
SMP test records, list of open M0 issues
Requires boards, firmware, and documentation in hand. If the platform blocks progress, the hardware verification dates are revised first.
Consolidate reproducible emulation tests, and check dev board power-up, wiring, boot media, and external firmware versions.
M0 regression summary, M1 prerequisites checklist
Once the necessary documentation is in hand, bring up boot and serial output on the real board, logging each boot blocker along the way.
Board UART demo, boot issue log
Verify interrupts, timers, and basic pin control item by item against the Genio 720 register documentation.
Board basic-interface test records
Verify available I2C peripherals and organize clock and pinmux settings.
I2C verification, initialization and platform-difference table
Check that cold boot through UART and basic interfaces is repeatable. No claim is made at this point of booting a full UI.
M1 milestone summary, failure rate, and to-do list
Centered on reproducible M0 / M1 results, with power-off standby evaluated in parallel. The M2 fully operable prototype is scheduled separately.
Using available hardware, check always-on control, main SoC power switching, and signal isolation. Record the actual test configuration.
Power control tests, isolation and standby measurement records
Test wake strategies one by one with the available always-on controller, RTC, and LoRa module, measuring missed events, latency, and boot energy.
Wake tests, revised energy budget; unfinished items listed separately
Based on documentation and board test results, estimate the work for display, touch, storage, and file system, and confirm staffing needs.
M2 work breakdown, documentation gaps, and effort estimate
Demonstrate the M0 / M1 and power concept tests actually completed, listing limitations, resources used, and acceptance items still open.
Milestone demo video, test summary, and resource usage record
Schedule M2 based on acceptance results, parts delivery, and available hours. M3 / M4 will be scheduled once core operation is in place.
Next-phase scope, resource needs, and revised timeline
Confirm provenance rules, the linked image, and the terms for obtaining and using DDR and BL31 before starting platform work.
If funding, parts delivery, or boot documentation stalls, keep QEMU verification and testing on available equipment going, and reschedule M1.
M0 / M1 is not a usable device. M2's display, touch, storage, and UI must be integrated and accepted separately.
Current decisions
CORE centers on a portable phone form factor. MAX centers on a landscape tablet and field collaboration.
Main compute is an OSM Size-L MediaTek Genio 720 (MT8391, industrial-grade) compute module, paired with a six-layer carrier board, a 1S battery, eSIM, and LR2021 (923 MHz). The operating system is built in-house.
Compute platform under selection. Takes nano-SIM and eSIM, and offers more room for maps and information.
To be verified
The items below still need to be confirmed.
They do not indicate passed tests.
Align the new schematic, bill of materials, module pinout, and display and communication interfaces.
Confirm the cell configuration, power draw in each operating state, charging conditions, and overall battery life.
Step by step, confirm the boot flow, drivers, messaging, positioning, and map operation.
Verify thermals, grip, contacts, antennas, and environmental resilience, producing traceable test data.
About this information
"Design decision" means a configuration the team has chosen but not yet verified on real hardware. "To be verified" means it still needs to be confirmed through actual integration and testing. Neither is a shipped product specification.
Product images on this site are exterior concept illustrations. Battery life, protection, size, weight, and performance will be determined by later decisions and measurements.
Compiled from the WAYFINDER master design sheet and project selection records. Older configurations in past documents are not current product commitments.
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